D/A conversion FPGA Mezzanine Card
The IC-DAC-FMCa board is part of our Front End Processing product line to respond to the increasing demand in fast data sampling and transfer for embedded systems especially in the field of Software defined Radio, Radar and Electronic Warfare solutions.
Designed for applications where high speed D/A converion is required, the IC-DAC-FMCa is a VITA 57.1 FPGA Mezzanine Card (FMC). It offers a flexible connectivity with our FPGA 3U and 6U Front End Processing boards running our Signal Processing Regerence Design (including signal acquisition, Processing DMA Engine, data storage, signal generation,…) thus allowing customers to streamline development of high performance signal acquisition systems by concentrating their efforts on their most critical tasks.
Analog Inputs
Two DAC5682Z Texas Instruments™ DACs with 16 bit resolution
4 channels with SSMC connectors
Output impedance 50 ? AC coupled
Analog output bandwitdth (-3dB) 600 MHz. Full scale amplitude 1 V peak-peak
Clocks
External Clock (CKI) Reference Clock (REFI):
SSMC connector, 50 ?, AC coupled
Input level. Sine wave: 0 to +10dB. Square wave: LVPECL single ended
Frequency range: 50 MHz to 550 MHz
Sampling Clock (CKI):
SSMC connector, 50 ?, AC coupled
Input level : Sine wave or square Wave 0 to +10dB.
Frequency range: 100 MHz to 1000 MHz
Clocking options:
External Clock Input (CKI)
VCXO locked on external reference
VCXO locked on internal TCXO
Clock Output (CKO):
SSMC connector, 50 ?, AC coupled
1V peak-peak
Trigger input
SSMC connector, 50 ?, DC coupled
LVPCEL Single ended
ADC digital interface
16 LVDS data
Two’s complement of Offset binary
Board Electrical/environmental
VITA 57.1 HPC single width module
Power dissipation: 8 W
FMC I/O voltage: VADJ=2.5V
Air cooled (Rugged air cooled. Conduction-cooled possible)
Interface features
Front board. 7 x SSMC connectors
4 x Analog Inputs
One Clock input: Sampling Clock (CKI) or Reference
Clock (REFI)
One Clock output (CKO)
One Trigger Input Clock
FMC connector according to VITA 57.1:
16 LVDS data + 1 LVDS clock for each DAC device
| Criterion | Standard | Extended | Rugged | Conduction-cooled 71°C | Conduction-cooled 85°C |
| Coating | Optional | Yes | Yes | Yes | Yes |
| Operat. Temp. | 0 to 55°C | -20 to 65°C | -40°C to 71°C or 85°C (*) | -40°C to 71°C at the thermal interface (*) |
-40°C to 85°C at the thermal interface (*) |
| Rec. airflow | 1 .. 2 m/s | 2 .. 3 m/s | 2 .. 5 m/s | - | - |
| Oper. HR% no cond. | 5 to 90% | 5 to 95% | 5 to 95% | 5 to 95% | 5 to 95% |
| Storage Temp. | -45°C to 85°C | -45°C to 85°C | -45°C to 100°C | -45°C to 100°C | -45°C to 100°C |
| Sinusoidal Vibr | 2G [20..2000]Hz | 2G [20..2000]Hz | 5G [20..2000]Hz | 5G [20..2000]Hz | 5G [20..2000]Hz |
| Random Vibr | 0.002g2 /Hz [10..2000]Hz |
0.002g2 /Hz [10..2000]Hz |
0.05g2 /Hz [10..2000]Hz |
0.1g2 /Hz [10..2000]Hz |
0.1g2 /Hz [10..2000]Hz |
| Shock 1/2 Sin. 11ms | 20G | 20G | 40G | 40G | 40G |
Single Board Computers
FPGA Boards
FPGA Boards
Contact us