[ Description ] [ Specifications ] [ Software ] [ ]				(119Ko) info doc

Description

IC-PQ3-VMEa is powered by a MPC8541E, MPC8555E or a MPC8560, being part of the PowerQUICCIII processor family. This e500 core is a 2-way super-scalar and 7-stage pipeline design with out-of-order issue and execution. The core implements three integer units : two simple and one complex for integer multiply, divide. A 64-bit signal processing unit with 64-bit GPRs completes the embedded processor. The core also integrates two 32KB L1 caches and a 256KB L2.

The PowerQUICC III integrates two 10/100/1Giga and one 10/100 Ethernet controllers, 4-channel DMA and a multi-channel interrupt controllers. The 8560 model supports PCI-X transactions and optionally an additional RapidIO bus to run with a PMC card.

The IC-PQ3-VMEa VMEbus interface is compliant with VME32, 64x and 2eSST access. The 2eSST transfer rate can be set to 160, 267 or 320MB/s. Two independent single channel DMA controllers allow many types of exchange between the local PCI and the VME busses : PCI-VME, VME-PCI, VME-VME and PCI-PCI. The VMEbus interface is based on a combination of the Tundra Tsi148 VME bridge and the latest generation of Texas Instrument VMEbus transceivers.

IC-PQ3-VMEa has a PMC 32-bits 33/66MHz extension slot. Its Pn IO is routed to the P2 VME rear connector.

The communication processor channels (MPC8555E and 8560 only) are connected to a local FPGA available for user’s application. The customer can use specific mezzanine card or standard functions such as multi-mode serial, isolated RS485 provided by Interface Concept.

IC-PQ3-VMEa equipped with a MPC8541E or 8555E implement a security engine that for instance performs single-pass encryption and authentication as required by security protocols such as Ipsec.

IC-PQ3-VMEa Features

Processor Unit

• e500 core running from 533 to 833 MHz with :

• L1 caches : 32KB Inst. and 32KB Data with parity

• 256 KB of L2 integrated cache or private SRAM

• MMU and FPU-SP capabilities

• DMA-channel controllers

• 128 or 256MB SDRAM-DDR266 with ECC

• 32 or 64 MB soldered Flash

• 32KB SPI EEPROM

• 2KB I2C EPROM

• PPC Real Time clock and four 32 bit-timers

• 1MB SRAM and calendar clock with lithium cell or supercap backup

• Temperature sensor

I/O subsystem

• VME64x with 2eSST

• Two front Ethernet Giga Ethernet ports with L2 acceleration and support for Jumbo frames. One channel can be used on the rear P0 connector.

• One front Ethernet 10/100TX port

• One RS232 console

• FPGA Cyclone 2

• Communication Processor Module providing :

• 2 or 3 additional Enhanced Multi-protocol channels (Fast Ethernet, ATM, TDM with 256 HDLC)

• 3 or 4 Async/Synchronous serial controllers (8555E/8560)

• One PMC slot with PCI, PCI-X (8560 only)

Accessories

• Engineering kit for debug : JTAG/COP and RS232 console

• Add-on Adapter to plug an extension compliant with CompactFlash Type II (5mm thick) cards

• A second processor with our IC-PQ2/3-PMC

IC-PQ3-VMEa on-board firmware

Our software takes in charge that Motorola’s new MPC8560 is the legacy of the PowerQUICC architecture. IC’s on-board firmware is a comprehensive set of software stored in flash memory including:

IC_Boot

This module is called by the reset vector when the board is powered up. It initializes the PowerQUICCIII, the memory controller, performs the Power on self tests, the module IC_Bios, before using the PCI bridge and jumping in different applications according to the values stored in memory.

IC_Bios

This module allows the user to access the specific IC-PQ3-VMEa hardware resources via an easy-to-use API. A set of about 60 functions are provided.

IC_Tools

It is a firmware monitor which allows loading files from Ethernet via Bootp, running files in RAM or flashing them. In addition it permits to display or modify the RAM data. To end with, it enables the user to perform maintenance tests.

IC-BSP basic

These BSPs products are based on the standard distribution of the OS editor. They take in charge hardware initialization, interrupt handling and generation, hardware clock and timer services, memory management, PCI management, mapping of memory spaces, serial ports, MAC driver for Gigabit and Fast Ethernet ports. For the MPC8560, the advanced CPM functionalities require specific protocol drivers.

Interface Concept provides and supports BSP for VxWorks® from Windriver and Linux® operating systems. Other RTOS (LynxOS, Integrity, etc.) can be ported on request.

Board specifications

Front panel LEDs

Power supply and status

Power supply

15 Watts on 5VDC Power Supply only (without PMC card)

Board size

233.4*160*20.32 mm

Interfaces Features

VMEbus interface
DTB Master : A16, A24, A32, A64 ; D08-D64, SCT, BLT, MBLT, 2eVME, 2eSST
DTB Slave : A16, A24, A32, A64 ; D08-D64, SCT, BLT, MBLT, 2eVME, 2eSST, UAT
Arbiter : RR/PRI
Interrupt : handler/generator with IRQ[1..7]
System controller with auto detect

PMC slot :
Signaling : 3.3 and 5V tolerant
PCI , PCI-X 33, 66 or 100MHz
Address/Data : A32/D32
PMC connectors : Pn1.2.4 and optional XMC connector Power : +3.3V, +5V, +/-12V

Performance : 

VME 2eSST slave acces (2KB) : 300MB/s

VME MBLT slave acces (2KB) : 90MB/s

DMA acces (8KB) : 230MB/s

Diagram