Description

IC-e6-cPCIa is powered by a MPC7447A or a MPC7448, being part of the PowerPC processor family. These processors feature a high-frequency super scalar PowerPC core capable of issuing four instructions per clock cycle into 11 independent execution units : four integer units, one double-precision floating point unit, four Altivec units, load/store and branch processing units. This e600 (7474A) core provides 2310 Dhrystone 2.1MIPS @ 1GHz and 3230 Dhrystone 2.1MIPS @ 1,4GHz with the MPC7448 . The e600 core is planned to scale beyond 2GHz and to support Multiprocessing Chip.

IC-e6-cPCIa implements a Discovery^TMIII chipset to fill out the processor. This solution includes major enhancements such as : data streaming on MPX bus, read memory latency and cache coherency improvements. The MV64460 indeed, adds 2 Mbits of high speed burst SRAM, two XOR DMA (useful for RAID, SCSI) and four IDMA engines.

IC-e6-cPCIa integrates many communication functions : two Giga Ethernet channels, two multi-purpose serial controllers. An USB2 controller combined with a hub function provide two high/full speed ports.

A 64-bit PCI or PCI-X controller allows the IC-e6-cPCIa to receive a PMC board in compliance with PCI 2.2 or PCI-X.

IC-e6-cPCIa can run as host or peripheral board. The boot software will configure automatically the PCI bridge.

IC-e6-cPCIa uses a new power management. The processor clock can be changed dynamically following the temperature information monitored by a sensing diode included in the die. This board is available in standard, extended and Conduction-cooled grades.

IC-e6-cPCIa can be used with many major RTOS and Linux

IC-e6-cPCIa features

Processor unit

- MPC7447A running at 1GHz with :

       - L1 caches : 32KB Inst. and 32KB Data with parity

       - 512KB of L2 integrated cache with ECC

- Or MPC7448 running at 1,27 or 1,4 GHz with :

       - L1 caches : 32KB Inst. and 32KB Data with parity

       - 1 MB of L2 integrated cache with ECC

- 256 or 512MB SDRAM-DDR with ECC

- 64MB soldered Mirror Flash

- Up to 1 GB soldered Nand Flash

- 2 Mb (128-bit access wide) of high speed SRAM

- 32K-word of FRAM (non-volatile memory)

- PPC Real Time clock and four 32 bit-timers

- Calendar clock with supercap backup

- Temperature sensor and monitoring

I/O subsystem

-Marvell Discovery^TM III system controller :

      - Two Ethernet 10/100/1000TX ports with :

              - support for Jumbo frames

              - virtual Cable tester, implemented in the Ethernet transceivers, providing 

                a remote identification of potential cable malfunctions as excessive pair  

                skew, cable opens, impedance mismatch…

              - routed on rear J2connector

      - One multi-purpose serial interfaces on J2

- One USB2 controller with an internal hub

      - Two high/full speed ports routed on J2

- 4 GPIO on J2

- One 32/64-bit PMC slot with Pn4 (46 IO) routed on J2

Accessories

- Engineering kit for debug : JTAG/COP and console

- Rear Transition Module providing on a rear panel : 2 Giga RJ45, 2 USB2, one RS232 port and one on-board high density connector for the PMC IO. 

IC-e6-cPCIa on-board firmware

The basic firmware takes in charge Freescale’s new MPC7447A/7448 and the Marvell chipset DiscoveryIII initialization. This on-board firmware, based on the open-source UBOOT, is a comprehensive set of software stored in a secured flash.

UBoot

It is called by the reset vector when the board is powered up. It initializes the PowerPC and the Discovery^TMIII system controller, performs a comprehensive Power-on self-tests (PBIT), before to jump in different applications according to the values stored in memory. If the board acts as a Monarch PMC, the software executes a enumeration step, otherwise it waits the PCI startup sequence from the host. In standalone mode the board directly runs the configured application.

The firmware allows loading files from Ethernet via Bootp, running files in RAM or flashing them. In addition, it allows some monitor functions as : display or modify the RAM data. To end with, it enables the user to perform maintenance tests.

IC_Bios

This module allows the user’s access to the specific IC-e6-cPCIa hardware resources via an easy-to-use API. This module is used as a library with Vxworks and as a dynamically loaded library module for Linux.

IC-BSP basic
These BSPs products are based on the standard distribution of the OS editor. They take in charge hardware initialization, interrupt handling and generation, hardware clock and timer services, memory management, PCI management, mapping of memory spaces, serial ports, MAC driver for Gigabit ports.

Interface Concept provides BSP for VxWorks® and Linux® operating systems. Other RTOS (LynxOS, Integrity...) can be ported on request..

Diagram 

This document supersedes any earlier documentation relating to the products referred to herein. The information contained in this document is current at the date of publication. It may subsequently be updated or withdrawn without notice.
COPYRIGHT INTERFACE CONCEPT - 2006 - IC-e6-cPCIa v07.pub. All names, products and services mentioned are trademarks or registred trademarks of their respective holders.