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CTRL-EP31
System for the Electronic Power Converter Control

 
 
 
 
 
 
 
 
 
[ EP31-CPU ]

[
EP30-EXT1 ]

[
EP30-CAPx ]

[ ]

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( 429Ko)

The CTRL-EP31 system, proposed by Interface Concept, is an electronic package especially designed for the electronic control of the power converter. It is an enhanced version of the CTRL-EP30 used in harsh industrial and embedded applications. This new version increases the processing capabilities to 150 MFLOPS and 75 MIPS while consuming less. This board provides integrators and OEMs with an off-the-shelf platform, in view of creating high-performance applications with a high level of integration.

Approved for cruise ship, electrical bus and turbine engines and wind engines

 

 

CTRL-EP31 is a software and hardware solution

 

 

Equipment based on an electronic module package:

  • CPU - EP30-CPU board: 32 bit-DSP processor, memory, communications (CAN, UART network, E/S port), VME bus, Bus extension towards EP30-EXTxx board(s).
  • Extension - 1 or 2 EP30-EXT1 boards: analogical E/S, E/S TOR, PWM outputs, incremental/absolute encoders.
  • Adaptation - EP30-CAP1 & 2 cards: sensor/bridge supply voltage distribution and monitoring, I_current and U_voltage measure conditioning.
  • Junction kit: cables and terminal block allowing an easy system wiring.

Software modules:

  • Library including all the functions required by the application development through Texas tools on PC or Station
  • Integration into the client's platform of the RTIC library in order to interface Matlab / SimulinkTM
  • Application Flash memory programming via the Texas emulator port.
  • Optional: application Flash memory programming and downloading via the CAN network and a RS232 linkage.

Adjustment help:

  • Debug via the Texas emulator port
  • 4 analogical outputs allowing to view the system variables
  • Data recovery by the communication ports

CTRL-EP31 is provided with a programmable logic generating PLI or impulsive commands.

EP31-CPU

CTRL-EP31 system is based on a EP31-CPU processor board and one or two EP30-EXT1 I/O boards. This EP31-CPU board handles one or two EP30-EXTx expansion boards. A jumper on the expansion board allows selecting its address. Two expansion boards can operate separately or in a synchronous way. On an operation in synchronous mode, the Master card generates on the extension bus the signals, which are necessary to the slave board synchronisation. The various data initiations linked to a power bridge command are spread on the extension bus to make the other power bridge stop.

EP31-CPU Specifications

DSP Processor TMS 320C33 - 150MHz
Memory

Internal SRAM 32+2 K32 0WS External SRAM 128K32 1WS External FlashEprom 2M8 3WS

Extension bus 16bits for two EP30-EXT1-x boards
FPGA logic Altera EPF1K30
VME bus D16 Slave (1K16 DP RAM)
CAN network com. Port Intel 82527 - 1Mbit/s (opto-isolated option)
RS232 com. Port UART 16C550 - RS232
Emulator com. Port JTAG series type
System variable outputs ±10V - 12bits 4 analogical outputs
Supply voltage
5V - 1A max and ±12V - 40 mA by the P1 (VME) connector
Monitoring Supply voltages - Watchdog
Operating Temperature Ambient 0 – 70°C
Extended temperature range on request
CEM CEI 1004-2, 3, 4, 5, level 3
Weight 3,35 kg with FAV
Dimensions Height = 233,35mm(6U) - 261,8mm with FAV Length = 4TE-20mm Depth = 160 mm

EP31-CPU order ref.      700/012/010

 

EP30-EXT1

 

The EP30-EXT1 board includes interfaces adapted to the power bridge control, in combination with the CPU board. It handles namely:

  • Current (I) and voltage (U) analogical acquisitions
  • Measures of location/speed from quadrature and/or absolute encoders
  • The secured generation of 8 PWM impulses
  • Service TOR inputs and outputs
  • Protections against the Over-I, Over-U, … directly via hardware (<10µs)

DIFFERENTIAL ANALOGIC INPUTS

=> 8 synchronous analogical inputs (2*AD7861)

- Differential measure channel

- 11 bit-resolution (10 bits + sign)

- 5 channel- antialiasing fibre

- Sampler / static relay on each channel

- 8 channel- total conversion time = 18 µs

- Relative accuracy ±2 LSB

- ±5V voltage input

- L3 calculation from L1 and L2

- Security threshold adjustment SurL1, L2, L3, SurN…by software

 

=> E ANA acquisition synchronization selection

- On explicit software request

- By an adjustable periodic timer

- In a synchronous way at the order time (ex: PWM)

 

LOGIC INPUTS

=> 4 opto-isolated 2500Veff inputs

- 3 marked ones capable of generating software interrupts

- 1 input dedicated to the Emergency stop function

 

=> 4 15 to 30V OC inputs

These 4 inputs can be used to connect for example:

- 2 quadrature encoders in order to give a direction location/speed

      - Max. 10 KHz F - 100ns resolution
      - Duty cycle variable from 20 to 80%
      - 15V Push-Pull or 15 to 30V OC first stage

- 3 network phases for main supply/machine synchronisation(Interrupt generating at the voltage reset)

=> 8 15 to 30V OC inputs
These inputs can be used to connect the igniter, software interrupt, default state feedbacks, … for example.

ABSOLUTE ENCODER INPUT
14 bit- GRAY absolute encoder management with real-time checking of the integrity of the value provided for by the encoder. These inputs correspond to “Push-Pull” signals.

LOGIC OUTPUTS
1 relay output – 1 NO & 1 NF
4 optocoupled potential free outputs

32 DIGITAL I/O
Can be configured as inputs or outputs at TTL level, available on the user connector and conditionable on request.

IMPULSE GENERATING 
The board 8 impulse output generating channel allows the bridge command to be on IGBT, Thyristors, MosFET, … and is created the following way:
- Using a FPGA to generate impulses and ensure securities (dead times, minimal conduction duration, rectifier stop, invertor stop, …), signal formatting in a “Push-Pull” amplifier.
- Providing for a protected and monitored supply voltage.

PWM MODULE STANDARD DELIVERY
The EP30-EXT1-x is standard fit out with a PROM allowing the three arms.
Centred three-phased PWM system with complemented output and two complementary impulses to drive, e.g., braking arms.

 

 

EP30-EXT1 Specifications
FPGA Logic Altera RPF10K50 
Supply voltage 5V – 0,5 max
±12V — 200 mA max  
Operating temperature Ambient 0 - 70°C
CEM    CEM CEI 1004-2, 3, 4, 5 level 3
Weight 0,23 kg
Dimensions Height = 233,35mm (6U) - 261,8mm with FAV
Length = 4TE - 20mm
Depth = 100mm

EP30-EXT1 order ref.    700/020/010

SYSTEM WIRING


EP30-CAPx

EP30-CAP1

EP30-CAP1 Specifications
Supply voltage 1      
Standard ±24V — for ±12V or ±15V,
It is necessary to adjust the thresholds by resistance.
Supply voltage 2 24 or 48V obtained with 1 or 2 24V-serial modules
Operating Temperature Ambient 0 – 70°C
CEM CEI 1004-2, 3, 4, 5 level 3
Weight
0,25 kg
Dimensions Height = 100 mm (3U) – 128,4mm with FAV
Length = 8TE (40,3mm)  
Depth = 160mm

EP30-CAP1 order ref.      700/030/010


EP30-CAP2  

EP30-CAP2 Specifications
Supply voltage 1      
Standard ±24V — for ±12V or ±15V. It is necessary to adjust the thresholds by resistance.
Supply voltage 2 ±15V external supply voltage or created by ±24V regulation.
Operating Temperature Ambient 0 — 70°C
CEM CEI 1004-2, 3, 4, 5 level 3
Weight
0,25 kg
Dimensions Height = 100 mm (3U) – 128,4mm with FAV      
Length = 8TE (40,3mm)
Depth = 160mm

EP30-CAP2 order ref.      700/031/010



General information  
Additional Interface Concept offer:
We can offer you on the base of the EP30-CPU board, an adaptation of the EP30-RXTx board, in order to create, at a very reduced cost, appropriate inputs/outputs according to your needs.

This document supersedes any earlier documentation relating to the products referred to herein. The information contained in this document is current at the date of publication. It may subsequently be updated or withdrawn without notice.

COPYRIGHT INTERFACE CONCEPT - 2001 - CTRL-EP31vUKv02.pub. All names, products and services mentioned are trademarks or registred trademarks of their respective holders.

 

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